The H264-BP-E silicon intellectual property core is an advanced hardware implementation of the ITU-T H.264 Constrained Baseline profile, and supports the
real time encoding of video streams up to Profile Level 5.1.
H264-BP-E requires minimal host intervention as it only needs to be programmed once per video sequence. Once programmed, it can encode an arbitrary number
of video frames without needing any further intervention or assistance by the host system CPU.
H264-BP-E can accept the uncompressed raw video data in planar, interleaved, or macroblock scan format. It outputs standalone, standard compliant, Annex B
NAL byte stream format. No post processing on the output stream, other than saving or transmitting, is required by the host. The output NAL byte stream can
be decoded, as is, by any ITU-T H.264 compliant decoder that satisfies the level requirements of the stream and conforms to the Constrained Baseline, or higher,
ITU-T H.264 profile.
The H264-BP-E core implements a simple but yet flexible, requests based, external memory interface with independent read and write data paths. This makes
the H264-BP-E independent of memory type supporting, for example, operation with SRAM, SDRAM, DDR, DDR2 and DDR3 types of memory. Glue-less connected external
memory controllers are also available. H264-BP-E is designed to be tolerant to memory delays and latencies, which may be present on shared memory system architectures.