The Alma Technologies SDR-SDRAM-CTRL core provides a simplified, burst-optimized interface to industry standard Mobile and ordinary SDRAM devices. The main characteristics of this core are:
Ease-of-use − All management and initialization procedures are done by the controller. Furthermore, all required address, page and burst handling procedures are abstracted from the user.
Flexibility − All memory parameters are runtime configurable. The core can be configured, at runtime, to support from 16Mbit deviced up to eight 512Mbit devices, or up to four 2GByte DIMMs.
Performance − Pipelining and parallel state machines design practices achieve maximal memory bandwidth utilization.
The SDR-SDRAM-CTRL provides a simple and easy-to-use user interface, with separate read and write paths. It allows for single word accesses, as well as arbitrary length bursts, emulating a linear memory space with no page or bank boundaries.
The SDR-SDRAM-CTRL IP is available only for FPGA based implementations.