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SVE-JPEG-E

8-bit SpeedView Enabled Baseline JPEG Encoder

Description
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SVE-JPEG-E Symbol | Alma Technologies


Features

Scalado CAPS™ Compliance

Integrates SpeedTags™ technology


Baseline ISO/IEC 10918-1 JPEG Compliance

Programmable Huffman Tables (two DC, two AC)

Programmable Quantization Tables (up to four)

Up to four color components

Supports all possible scan configurations and all JPEG formats for input and output data

Supports any image size up to 64K x 64K

Supports DNL and restart markers

Standalone, Baseline JPEG stream output


Additional Processing Capabilities

Programmable Quantization Quality (1 to 100)

Motion JPEG payload encoding

One-pass compression ratio regulation

Motion JPEG video oriented rate control option with programmable nominal output frame size and transmission buffer size in bytes Block-based, rate control option with independent Luminance and Chrominance thresholds

Ease of Integration

Registered I/O ports

Simple, microcontroller like, programming interface

High speed, flow controllable, streaming I/O data interfaces

Simple and FIFO like

Avalon-ST™ compliant (read latency 0)

Single clock per input sample processing rate

Fully programmable through standard JPEG marker segments

Automatic JPEG markers generation on the output

Automatic program-once encode-many operation


Easy System Implementation and Verification

Extensive documentation

Bit Accurate Model (BAM)

Test Vector generation

Self checking testbench environment

Sample BAM scripts

Synthesis scripts

Simulation scripts

Place & Route scripts for FPGAs


Trouble-Free Technology Map and Implementation

Fully portable HDL source code

No internal tri-states

Scan-ready design

Strictly positive edge triggered design using D-type only Flip-Flops

Fully synchronous operation

No need for special timing constraints

No false paths

No multi-cycle paths

No special handling paths



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