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Quad SPI Flash Memory Controller

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The Alma Technologies SPI-MEM-CTRL core is an advanced SPI serial NOR flash memory controller, supporting Single, Dual and Quad I/O SPI accesses and including Boot and Execute on-the-fly features.

The SPI-MEM-CTRL controller automatically identifies a variety of serial NOR flash memories and communicates with the memory device at the maximum possible bandwidth. Register accesses are used to insert memory access requests and to read/write memory data from/to the SPI-MEM-CTRL core. Communication with devices other than those automatically identified is also available as the core can be programmed by the user with the memory device parameters. The SPI-MEM-CTRL can read, write or erase any part of the memory.

The SPI-MEM-CTRL controller has been rigorously verified. A complete verification environment that helps designers verify the functionality and compliance of the core, including additional aids for system-level simulation, are available.

SPI-MEM-CTRL block diagram | Alma Technologies

IP Deliverables

Clear text VHDL or Verilog RTL source for ASIC designs, or pre-synthesized and verified Netlist for Altera, Lattice, Microsemi and Xilinx FPGA and SoC devices

Release Notes, Design Specification and Integration Manual documents

Bit Accurate Model (BAM) and test vector generation binaries, including sample scripts

Self checking testbench environment, including sample BAM generated test cases

Simulation and sample Synthesis (for ASICs) or Place & Route (for FPGAs) scripts

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