The SPI-MEM-CTRL core offers the interconnection between a host and a serial flash memory using the Serial Peripheral Interface.
The SPI-MEM-CTRL supports Single, Dual Input, Dual Input/Output and Quad Input/Output SPI accesses.
The core automatically identifies a variety of serial flash memories and communicates with the attached device at the maximum
possible bandwidth. Register accesses are used to insert access requests and read/write data into/out SPI-MEM-CTRL core.
Communication with devices other than those automatically identified, is also feasible as the core can be programmed with the memory
device parameters. The SPI-MEM-CTRL can read, write or erase any part of the memory.
The core is rigorously verified. A complete verification environment that helps designers verify the functionality and compliance
of the core, and additional aids for system-level simulation are available.
The SPI-MEM-CTRL core is suitable for any SoC design
that uses a serial Flash device.