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- • UHT Image & Video Compression IP
  Scalable IP Cores for Ultra−High Throughput Compression.
- • H264 Video Compression IP
  H.264 Video Encoding
- • Image Compression IP
  JPEG, JPEG 2000, JPEG-LS, DSC and CCSDS 122.0 Compression.
- • Cryptographic Functions IP
  AES Block Ciphers and Hash Functions.
  - • AES Block Cipher IP
  - • Hash Function IP
- • Controllers IP
  SPI, SPI Flash Memory Controllers
  - • Quad SPI Flash Controller
  - • Serial Peripheral Interconnect Bus Controller
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FPGA & ASIC IP Cores

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Crafting quality IP Cores since 2001

Alma Technologies IP cores stand out for their engineering, being complete, easy-to-use and reliable solutions. World-class technical support and a long track record of proven designs by more than 250 licensees in over 20 countries provide our customers with excellent service and great value.

Available either as autonomous, high-quality and implementation technology independent VHDL or Verilog RTL, or as optimized Netlists for AMD-Xilinx, Efinix, Intel, Lattice and Microsemi FPGA and SoC devices, Alma Technologies IP ensures a fast and trouble-free integration in any FPGA or ASIC design.

HIGHLIGHTS

VESA DSC 1.2b Encoder & Decoder IP cores

, offer ultra-low latency, visually lossless, deep color compression for transporting up to 10K @120Hz video.

CCSDS 122.0-B-1 Encoder IP Core

designed for space applications, offers lossless or lossy image data compression using a memory-efficient reduced complexity algorithm.

Ultra-High Throughput JPEG, JPEG 2000, DSC & H.264 IP Cores

offer scalable and ultimate performance for massive pixel rates in cost-effective FPGA and ASIC implementations.

Our

JPEG Encoder IP core

compresses images aboard NASA's Curiosity Mars rover in Malin Space Sciense Systems cameras.

High-Efficiency H.264 IP Cores

offer exceptional image quality in an easy-to-use and integrate, autonomous hardware solution.

PRODUCTS

UHT™ Image & Video Compression IP

Ultra-High Throughput JPEG, JPEG LS, JPEG 2000, DSC and H.264 Compression

Powered by a scalable and transparent multiple processing engines architecture, our UHT™ Image and Video Compression IP cores bring all the speed needed today in the 4K/8K Ultra HD and High-Frame-Rate applications. Packed with configurable expanded features and silicon speed versus size versatility, these IP cores optimize resource usage and enable massive pixel rates in highly cost-effective FPGA and ASIC implementations.

H264 Video Compression IP

True H.264 Encoding Efficiency and Perceptually Optimized Image Quality

A full range of autonomous, easy-to-use, CPU/GPU-less, strictly compliant and widely configurable IP cores for Baseline, Main and High Profiles H.264 encoding, supporting 8-, 10- and 12-bit per component color depth in 4:2:0 and 4:2:2 chroma sampling.

A very rich and well balanced H.264 feature set is offered, along with six base configurations and more than five key options to fine-tune each. These ensure the best mapping of application requirements to bandwidth, latency, area and power figures, while minimizing the system BOM and IP licensing costs.

Image Compression IP

The Broadest IP Portfolio for JPEG, JPEG 2000, JPEG-LS, DSC and CCSDS Compression

Standard or High Dynamic Range - up to 16-bit per component - lossy, visually lossless and numerically lossless compression of Full Color - 4:4:4, 4:2:2, 4:1:1, 4:2:0 and more - or Grayscale, Infrared and Panchromatic image data.

8-bit Baseline or 10/12-bit Extended JPEG compression, including Constant Bitrate video encoding.

Up to 16-bit per component lossy and numerically lossless JPEG 2000 encoding, including high-quality, accurate rate control and single-component Multiple Quality Layers support.

JPEG-LS encoding, offering the JPEG 2000 lossless compression efficiency advantage in much more compact silicon footprint and without requiring an external memory device.

DSC 1.2b visually lossless image data compression with up to 16-bit pixel dynamic range.

CCSDS 122.0 lossless and lossy image data compression with up to 16-bit pixel dynamic range.

Cryptographic Functions IP

AES Block Ciphers and Hash Functions

Advanced Encryption Standard - AES - Encryption & Decryption IP with ECB, CBC, CFB, OFB, CTR and GCM modes of operation.

MD5, SHA-1 and SHA-256 Hash Functions IP.

Controllers IP

Robust, Efficient, Tried-And-True SPI Bus and SPI Flash Memory Controllers

Single, Dual and Quad SPI Flash Memory Controller IP with Boot and Execute On-The-Fly features.

SPI bus Master and Slave Interface Controller IP.

NEWS

Demonstrating Alma Technologies DSC 1.2b Decoder IP at the AMD booth in ISE 2025, 4 Feb - 7 Feb, Fira Barcelona

Alma Technologies participated in the VISION 2024 International Trade Fair for Machine Vision, held in Stuttgart, Germany, from October 8-10, 2024.

Alma Technologies Scales-up the Performance of the JPEG-LS Image Compression IP Core by Employing its Ultra High Throughput − UHT™ Architecture

Alma Technologies Launches Scalable Encoder and Decoder Semiconductor IP for VESA DSC 1.2b Visually Lossless Compression

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Product Literature

EN ISO 9001:2015 Certified