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Lossless JPEG Decoder

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LJPEG-D Symbol | Alma Technologies


ISO/IEC 10918-1 (Annex H) Compliant Lossless JPEG Decoder

Up to 64K x 64K image resolution

1, 2 or 3 (4:4:4 only) image components

2-16 bit per image component

Up to 4 stream programmable Huffman Tables

Stream programmable Restart Interval

Stream programmable Point Transform function

Limitations with Respect to the ISO/IEC 10918-1 Standard

Up to 3 image components are supported
(Nf field of the SOF3 marker segment = 1 or 2 or 3)

(Only one SOS marker segment, with Ns field = Nf)

The DNL marker is not supported
(Y field of the SOF3 marker segment > 0)

Fixed parameters

No sub-sampling
(Hi and Vi fields of the SOF3 marker segment = 1)

Prediction function is fixed to the left-hand predictor
(Ss field of SOS marker segment = 1)

Ease of Integration

Single clock cycle per decoded sample throughput

Simple, microcontroller like, programming interface

High-speed, flow controllable, streaming I/O data interfaces

Simple and FIFO like

Avalon-ST compliant (ready latency 0)

AXI4-Stream compliant

CPU-less, standalone operation

Trouble-Free Technology Map and Implementation

Fully portable, self-contained RTL source code

Strictly positive edge triggered design

D-type only Flip-Flops

Fully synchronous operation

No special timing constraints required

No false paths

No multi-cycle paths

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